#include <dt-bindings/interconnect/qcom,lemans.h>

&pm8775_2_gpios {
	cnss_pins: cnss_pins {
		cnss_wlan_en_active: cnss_wlan_en_active {
			mux {
				pins = "gpio7";
				function = "normal";
			};

			config {
				pins = "gpio7";
				output-high;
				bias-pull-up;
			};
		};

		cnss_wlan_en_sleep: cnss_wlan_en_sleep {
			mux {
				pins = "gpio7";
				function = "normal";
			};

			config {
				pins = "gpio7";
				output-low;
				bias-pull-down;
			};
		};
	};
};

&soc {
	wlan: qcom,cnss-qca-converged {
		compatible = "qcom,cnss-qca-converged";
		qcom,wlan;
		qcom,multi-wlan-exchg;
		qcom,wlan-rc-num = <0>;
		qcom,bus-type=<0>;
		qcom,notify-modem-status;

		reg = <0xb0000000 0x10000>;
		reg-names = "smmu_iova_ipa";

		vdd-wlan-ctrl1-supply = <&vreg_conn_pa>;
		vdd-wlan-ctrl2-supply = <&vreg_conn_1p8>;
		vdd-wlan-aon-supply = <&pm8775_c_l2>;
		vdd-wlan-rfa1-supply = <&pm8775_e_l6>;
		vdd-wlan-rfa2-supply = <&pm8775_a_s5>;

		wlan_vregs = "vdd-wlan-ctrl1", "vdd-wlan-ctrl2", "vdd-wlan-aon",
			     "vdd-wlan-rfa1", "vdd-wlan-rfa2";
		qcom,vdd-wlan-ctrl1-config = <0 0 0 0 0>;
		qcom,vdd-wlan-ctrl2-config = <0 0 0 0 0>;
		/* no vote-off as sw_ctrl is not supported */
		qcom,vdd-wlan-aon-config = <1055000 1055000 0 0 0>;
		qcom,vdd-wlan-rfa1-config = <1350000 1350000 450000 0 0>;
		qcom,vdd-wlan-rfa2-config = <1900000 1900000 450000 0 0>;
		wlan-en-gpio = <&pm8775_2_gpios 7 0>;
		qcom,bt-en-gpio = <&pm8775_2_gpios 8 0>;
		pinctrl-names = "wlan_en_active", "wlan_en_sleep", "default";
		pinctrl-0 = <&cnss_wlan_en_active>;
		pinctrl-1 = <&cnss_wlan_en_sleep>;
		pinctrl-2 = <&cnss_wlan_en_sleep>;

		chip_cfg@0 {
			supported-ids = <0x1103>;
			qcom,wlan-ramdump-dynamic = <0x420000>;
		};

		chip_cfg@1 {
			supported-ids = <0x1102>;
			qcom,wlan-ramdump-dynamic = <0x400000>;
		};

		chip_cfg@2 {
			supported-ids = <0x1107>;
			qcom,wlan-ramdump-dynamic = <0x780000>;
		};
	};
};

&pcie0_rp {
	#address-cells = <5>;
	#size-cells = <0>;
	cnss_pci: cnss_pci {
		reg = <0 0 0 0 0>;
		qcom,iommu-group = <&cnss_pci_iommu_group>;

		#address-cells = <1>;
		#size-cells = <1>;

		cnss_pci_iommu_group: cnss_pci_iommu_group {
		qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
		qcom,iommu-dma = "fastmap";
		qcom,iommu-pagetable = "coherent";
		qcom,iommu-faults = "stall-disable", "HUPCF", "no-CFRE",
			 "non-fatal";
		};
	};
};