/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
 */

#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_MONACO_AUTO_H
#define __DT_BINDINGS_INTERCONNECT_QCOM_MONACO_AUTO_H

#define MASTER_GPU_TCU				0
#define MASTER_PCIE_TCU				1
#define MASTER_SYS_TCU				2
#define MASTER_APPSS_PROC				3
#define MASTER_LLCC				4
#define MASTER_CNOC_LPASS_AG_NOC			5
#define MASTER_GIC_AHB				6
#define MASTER_CDSP_NOC_CFG				7
#define MASTER_QDSS_BAM				8
#define MASTER_QUP_0				9
#define MASTER_QUP_1				10
#define MASTER_A1NOC_SNOC				11
#define MASTER_A2NOC_SNOC				12
#define MASTER_CAMNOC_HF				13
#define MASTER_CAMNOC_ICP				14
#define MASTER_CAMNOC_SF				15
#define MASTER_COMPUTE_NOC				16
#define MASTER_CNOC_A2NOC				17
#define MASTER_CNOC_DC_NOC				18
#define MASTER_GEM_NOC_CFG				19
#define MASTER_GEM_NOC_CNOC				20
#define MASTER_GEM_NOC_PCIE_SNOC				21
#define MASTER_GPDSP_SAIL				22
#define MASTER_GFX3D				23
#define MASTER_LPASS_ANOC				24
#define MASTER_MDP0				25
#define MASTER_MDP1				26
#define MASTER_MNOC_HF_MEM_NOC				27
#define MASTER_CNOC_MNOC_HF_CFG				28
#define MASTER_MNOC_SF_MEM_NOC				29
#define MASTER_CNOC_MNOC_SF_CFG				30
#define MASTER_ANOC_PCIE_GEM_NOC				31
#define MASTER_SAILSS_MD0				32
#define MASTER_SNOC_CFG				33
#define MASTER_SNOC_GC_MEM_NOC				34
#define MASTER_SNOC_SF_MEM_NOC				35
#define MASTER_VIDEO_P0				36
#define MASTER_VIDEO_PROC				37
#define MASTER_VIDEO_V_PROC				38
#define MASTER_QUP_CORE_0				39
#define MASTER_QUP_CORE_1				40
#define MASTER_QUP_CORE_3				41
#define MASTER_CRYPTO_CORE0				42
#define MASTER_CRYPTO_CORE1				43
#define MASTER_DSP0				44
#define MASTER_IPA				45
#define MASTER_LPASS_PROC				46
#define MASTER_CDSP_PROC				47
#define MASTER_PIMEM				48
#define MASTER_QUP_3				49
#define MASTER_EMAC				50
#define MASTER_GIC				51
#define MASTER_PCIE_0				52
#define MASTER_PCIE_1				53
#define MASTER_QDSS_ETR_0				54
#define MASTER_QDSS_ETR_1				55
#define MASTER_SDC				56
#define MASTER_UFS_MEM				57
#define MASTER_USB2				58
#define MASTER_USB3_0				59
#define SLAVE_EBI1				512
#define SLAVE_AHB2PHY_2				513
#define SLAVE_AHB2PHY_3				514
#define SLAVE_ANOC_THROTTLE_CFG				515
#define SLAVE_AOSS				516
#define SLAVE_APPSS				517
#define SLAVE_BOOT_ROM				518
#define SLAVE_CAMERA_CFG				519
#define SLAVE_CAMERA_NRT_THROTTLE_CFG				520
#define SLAVE_CAMERA_RT_THROTTLE_CFG				521
#define SLAVE_CLK_CTL				522
#define SLAVE_CDSP_CFG				523
#define SLAVE_RBCPR_CX_CFG				524
#define SLAVE_RBCPR_MMCX_CFG				525
#define SLAVE_RBCPR_MX_CFG				526
#define SLAVE_CPR_NSPCX				527
#define SLAVE_CPR_NSPHMX				528
#define SLAVE_CRYPTO_0_CFG				529
#define SLAVE_CX_RDPM				530
#define SLAVE_DISPLAY_CFG				531
#define SLAVE_DISPLAY_RT_THROTTLE_CFG				532
#define SLAVE_EMAC_CFG				533
#define SLAVE_GP_DSP0_CFG				534
#define SLAVE_GPDSP0_THROTTLE_CFG				535
#define SLAVE_GPU_TCU_THROTTLE_CFG				536
#define SLAVE_GFX3D_CFG				537
#define SLAVE_HWKM				538
#define SLAVE_IMEM_CFG				539
#define SLAVE_IPA_CFG				540
#define SLAVE_IPC_ROUTER_CFG				541
#define SLAVE_LLCC_CFG				542
#define SLAVE_LPASS				543
#define SLAVE_LPASS_CORE_CFG				544
#define SLAVE_LPASS_LPI_CFG				545
#define SLAVE_LPASS_MPU_CFG				546
#define SLAVE_LPASS_THROTTLE_CFG				547
#define SLAVE_LPASS_TOP_CFG				548
#define SLAVE_MX_RDPM				549
#define SLAVE_MXC_RDPM				550
#define SLAVE_PCIE_0_CFG				551
#define SLAVE_PCIE_1_CFG				552
#define SLAVE_PCIE_TCU_THROTTLE_CFG				553
#define SLAVE_PCIE_THROTTLE_CFG				554
#define SLAVE_PDM				555
#define SLAVE_PIMEM_CFG				556
#define SLAVE_PKA_WRAPPER_CFG				557
#define SLAVE_QDSS_CFG				558
#define SLAVE_QM_CFG				559
#define SLAVE_QM_MPU_CFG				560
#define SLAVE_QUP_0				561
#define SLAVE_QUP_1				562
#define SLAVE_QUP_3				563
#define SLAVE_SAIL_THROTTLE_CFG				564
#define SLAVE_SDC1				565
#define SLAVE_SECURITY				566
#define SLAVE_SNOC_THROTTLE_CFG				567
#define SLAVE_TCSR				568
#define SLAVE_TLMM				569
#define SLAVE_TSC_CFG				570
#define SLAVE_UFS_MEM_CFG				571
#define SLAVE_USB2				572
#define SLAVE_USB3_0				573
#define SLAVE_VENUS_CFG				574
#define SLAVE_VENUS_CVP_THROTTLE_CFG				575
#define SLAVE_VENUS_V_CPU_THROTTLE_CFG				576
#define SLAVE_VENUS_VCODEC_THROTTLE_CFG				577
#define SLAVE_A1NOC_SNOC				578
#define SLAVE_A2NOC_SNOC				579
#define SLAVE_DDRSS_CFG				580
#define SLAVE_GEM_NOC_CNOC				581
#define SLAVE_GEM_NOC_CFG				582
#define SLAVE_SNOC_GEM_NOC_GC				583
#define SLAVE_SNOC_GEM_NOC_SF				584
#define SLAVE_GP_DSP_SAIL_NOC				585
#define SLAVE_GPDSP_NOC_CFG				586
#define SLAVE_HCP_A				587
#define SLAVE_LLCC				588
#define SLAVE_MNOC_HF_MEM_NOC				589
#define SLAVE_MNOC_SF_MEM_NOC				590
#define SLAVE_CNOC_MNOC_HF_CFG				591
#define SLAVE_CNOC_MNOC_SF_CFG				592
#define SLAVE_CDSP_MEM_NOC				593
#define SLAVE_GEM_NOC_PCIE_CNOC				594
#define SLAVE_PCIE_ANOC_CFG				595
#define SLAVE_ANOC_PCIE_GEM_NOC				596
#define SLAVE_SNOC_CFG				597
#define SLAVE_LPASS_SNOC				598
#define SLAVE_QUP_CORE_0				599
#define SLAVE_QUP_CORE_1				600
#define SLAVE_QUP_CORE_3				601
#define SLAVE_BOOT_IMEM				602
#define SLAVE_IMEM				603
#define SLAVE_PIMEM				604
#define SLAVE_SERVICE_NSP_NOC				605
#define SLAVE_SERVICE_GEM_NOC_1				606
#define SLAVE_SERVICE_MNOC_HF				607
#define SLAVE_SERVICE_MNOC_SF				608
#define SLAVE_SERVICES_LPASS_AML_NOC				609
#define SLAVE_SERVICE_LPASS_AG_NOC				610
#define SLAVE_SERVICE_GEM_NOC_2				611
#define SLAVE_SERVICE_SNOC				612
#define SLAVE_SERVICE_GEM_NOC				613
#define SLAVE_SERVICE_GEM_NOC2				614
#define SLAVE_PCIE_0				615
#define SLAVE_PCIE_1				616
#define SLAVE_QDSS_STM				617
#define SLAVE_TCU				618

#endif