#include #include &soc { usb0: ssusb@a600000 { compatible = "qcom,dwc-usb3-msm"; reg = <0xa600000 0x100000>, <0x1fc6000 0x4>; reg-names = "core_base", "tcsr_dyn_en_dis"; #address-cells = <1>; #size-cells = <1>; ranges; USB3_GDSC-supply = <&gcc_usb30_prim_gdsc>; clocks = <&gcc GCC_USB30_PRIM_MASTER_CLK>, <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_SLEEP_CLK>; clock-names = "core_clk", "iface_clk", "bus_aggr_clk", "utmi_clk", "sleep_clk"; resets = <&gcc GCC_USB30_PRIM_BCR>; reset-names = "core_reset"; interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, <&pdc 14 IRQ_TYPE_EDGE_RISING>, <&pdc 15 IRQ_TYPE_EDGE_RISING>, <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "pwr_event_irq", "dp_hs_phy_irq", "dm_hs_phy_irq", "ss_phy_irq"; qcom,use-pdc-interrupts; qcom,use-eusb2-phy; extcon = <&eud>; qcom,dis-sending-cm-l1-quirk; qcom,core-clk-rate = <200000000>; qcom,core-clk-rate-hs = <66666667>; qcom,core-clk-rate-disconnected = <133333333>; qcom,pm-qos-latency = <2>; qcom,num-gsi-evt-buffs = <0x3>; qcom,gsi-reg-offset = <0x0fc /* GSI_GENERAL_CFG */ 0x110 /* GSI_DBL_ADDR_L */ 0x120 /* GSI_DBL_ADDR_H */ 0x130 /* GSI_RING_BASE_ADDR_L */ 0x144 /* GSI_RING_BASE_ADDR_H */ 0x1a4>; /* GSI_IF_STS */ interconnect-names = "usb-ddr", "usb-ipa", "ddr-usb"; interconnects = <&aggre1_noc MASTER_USB3_0 &mc_virt SLAVE_EBI1>, <&aggre1_noc MASTER_USB3_0 &config_noc SLAVE_IPA_CFG>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_USB3_0>; dwc3@a600000 { compatible = "snps,dwc3"; reg = <0xa600000 0xd93c>; iommus = <&apps_smmu 0x40 0x0>; qcom,iommu-dma = "atomic"; qcom,iommu-dma-addr-pool = <0x90000000 0x60000000>; dma-coherent; interrupts = ; usb-phy = <&eusb2_phy0>, <&usb_qmp_dp_phy>; snps,disable-clk-gating; snps,has-lpm-erratum; snps,hird-threshold = /bits/ 8 <0x0>; snps,is-utmi-l1-suspend; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; snps,dis_u2_susphy_quirk; snps,ssp-u3-u0-quirk; tx-fifo-resize; dr_mode = "otg"; maximum-speed = "super-speed-plus"; usb-role-switch; }; qcom,usbbam@a704000 { compatible = "qcom,usb-bam-msm"; reg = <0xa704000 0x18000>; interrupts = ; qcom,usb-bam-fifo-baseaddr = <0x146a6000>; qcom,usb-bam-num-pipes = <4>; qcom,disable-clk-gating; qcom,usb-bam-override-threshold = <0x4001>; qcom,usb-bam-max-mbps-highspeed = <400>; qcom,usb-bam-max-mbps-superspeed = <3600>; qcom,reset-bam-on-connect; qcom,pipe0 { label = "ssusb-qdss-in-0"; qcom,usb-bam-mem-type = <2>; qcom,dir = <1>; qcom,pipe-num = <0>; qcom,peer-bam = <0>; qcom,peer-bam-physical-address = <0x10064000>; qcom,src-bam-pipe-index = <0>; qcom,dst-bam-pipe-index = <0>; qcom,data-fifo-offset = <0x0>; qcom,data-fifo-size = <0x1800>; qcom,descriptor-fifo-offset = <0x1800>; qcom,descriptor-fifo-size = <0x800>; }; }; }; /* USB port related High Speed PHY */ eusb2_phy0: hsphy@88e3000 { compatible = "qcom,usb-snps-eusb2-phy"; reg = <0x88e3000 0x154>, <0x088e2000 0x4>, <0x0C276000 0x4>; reg-names = "eusb2_phy_base", "eud_enable_reg", "eud_detect_reg"; vdd-supply = <&pm_v6e_l1>; qcom,vdd-voltage-level = <0 880000 880000>; vdda12-supply = <&pm_v6e_l3>; clocks = <&rpmhcc RPMH_CXO_PAD_CLK>, <&tcsrcc TCSR_USB2_CLKREF_EN>; clock-names = "ref_clk_src", "ref_clk"; resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; reset-names = "phy_reset"; }; /* USB port related QMP USB DP Combo PHY */ usb_qmp_dp_phy: ssphy@88e8000 { compatible = "qcom,usb-ssphy-qmp-dp-combo"; reg = <0x88e8000 0x3000>; reg-names = "qmp_phy_base"; vdd-supply = <&pm_v8_l3>; qcom,vdd-voltage-level = <0 912000 912000>; qcom,vdd-max-load-uA = <47000>; core-supply = <&pm_v6e_l3>; usb3_dp_phy_gdsc-supply = <&gcc_usb3_phy_gdsc>; clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>, <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK_SRC>, <&usb3_phy_wrapper_gcc_usb30_pipe_clk>, <&rpmhcc RPMH_CXO_PAD_CLK>, <&tcsrcc TCSR_USB3_CLKREF_EN>, <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; clock-names = "aux_clk", "pipe_clk", "pipe_clk_mux", "pipe_clk_ext_src", "ref_clk_src", "ref_clk", "com_aux_clk"; resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, <&gcc GCC_USB3_PHY_PRIM_BCR>; reset-names = "global_phy_reset", "phy_reset"; pinctrl-names = "default"; pinctrl-0 = <&usb3phy_portselect_default>; qcom,qmp-phy-reg-offset = ; qcom,qmp-phy-init-seq = /* */ ; }; usb_audio_qmi_dev { compatible = "qcom,usb-audio-qmi-dev"; iommus = <&apps_smmu 0x100b 0x0>; qcom,iommu-dma = "disabled"; qcom,usb-audio-stream-id = <0xb>; qcom,usb-audio-intr-num = <2>; }; };