#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/iio/qcom,spmi-vadc.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/input/qcom,qpnp-power-on.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>

&spmi_bus {
	#address-cells = <2>;
	#size-cells = <0>;
	interrupt-controller;
	#interrupt-cells = <4>;

	qcom,pm8195@0 {
		compatible = "qcom,spmi-pmic";
		reg = <0 SPMI_USID>;
		#address-cells = <1>;
		#size-cells = <0>;

		pm8195_1_tz: qcom,temp-alarm@2400 {
			compatible = "qcom,spmi-temp-alarm";
			reg = <0x2400>;
			interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
			io-channels = <&pm8195_1_vadc ADC5_DIE_TEMP>;
			io-channel-names = "thermal";
			#thermal-sensor-cells = <0>;
		};

		pm8195_1_vadc: vadc@3100 {
			compatible = "qcom,spmi-adc5";
			reg = <0x3100>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
			interrupt-names = "eoc-int-en-set";
			#io-channel-cells = <1>;
			io-channel-ranges;

			/* Channel node */
			ref_gnd {
				reg = <ADC5_REF_GND>;
				label = "ref_gnd";
				qcom,pre-scaling = <1 1>;
			};

			vref_1p25 {
				reg = <ADC5_1P25VREF>;
				label = "vref_1p25";
				qcom,pre-scaling = <1 1>;
			};

			die_temp {
				reg = <ADC5_DIE_TEMP>;
				label = "die_temp";
				qcom,pre-scaling = <1 1>;
			};
		};

		qcom,power-on@800 {
			compatible = "qcom,pm8998-pon";
			reg = <0x0800>;
			mode-bootloader = <0x2>;
			mode-recovery = <0x1>;
			mode-rtc = <0x3>;
			mode-dm-verity-device-corrupted = <0x4>;
			mode-dm-verity-enforcing = <0x5>;
			mode-keys-clear = <0x6>;

			pon_pwrkey: pwrkey {
				compatible = "qcom,pm8941-pwrkey";
				interrupts = <0x0 0x8 0x0 IRQ_TYPE_EDGE_BOTH>;
				debounce = <15625>;
				bias-pull-up;
				linux,code = <KEY_POWER>;
			};

			pon_resin: resin {
				compatible = "qcom,pm8941-resin";
				interrupts = <0x0 0x8 0x1 IRQ_TYPE_EDGE_BOTH>;
				debounce = <15625>;
				bias-pull-up;
				linux,code = <KEY_VOLUMEDOWN>;
			};
		};

		pm8195_1_clkdiv: clock-controller@5b00 {
			compatible = "qcom,spmi-clkdiv";
			reg = <0x5b00>;
			#clock-cells = <1>;
			qcom,num-clkdivs = <2>;
			clock-output-names = "pm8195_1_div_clk1",
						"pm8195_1_div_clk2";
			clocks = <&rpmhcc RPMH_CXO_CLK>;
			clock-names = "xo";
		};

		pm8195_1_rtc: qcom,pm8195_1_rtc {
			compatible = "qcom,pm8941-rtc";
			reg = <0x6000>, <0x6100>;
			reg-names = "rtc", "alarm";
			interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
		};

		pm8195_1_gpios: pinctrl@c000 {
			compatible = "qcom,pm8150-gpio";
			reg = <0xc000>;
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		pm8195_1_sdam_2: sdam@b100 {
			compatible = "qcom,spmi-sdam";
			reg = <0xb100>;
		};

	};

	qcom,pm8195@1 {
		compatible ="qcom,spmi-pmic";
		reg = <1 SPMI_USID>;
		#address-cells = <2>;
		#size-cells = <0>;
	};

	/* below definitions are for the second instance of pm8195 */
	qcom,pm8195@4 {
		compatible = "qcom,spmi-pmic";
		reg = <4 SPMI_USID>;
		#address-cells = <1>;
		#size-cells = <0>;

		pm8195_2_tz: qcom,temp-alarm@2400 {
			compatible = "qcom,spmi-temp-alarm";
			reg = <0x2400>;
			interrupts = <0x4 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
			io-channels = <&pm8195_2_vadc ADC5_DIE_TEMP>;
			io-channel-names = "thermal";
			#thermal-sensor-cells = <0>;
		};

		pm8195_2_vadc: vadc@3100 {
			compatible = "qcom,spmi-adc5";
			reg = <0x3100>;
			#address-cells = <1>;
			#size-cells = <0>;
			#io-channel-cells = <1>;
			io-channel-ranges;

			/* Channel node */
			ref_gnd {
				reg = <ADC5_REF_GND>;
				label = "ref_gnd";
				qcom,pre-scaling = <1 1>;
			};

			vref_1p25 {
				reg = <ADC5_1P25VREF>;
				label = "vref_1p25";
				qcom,pre-scaling = <1 1>;
			};

			die_temp {
				reg = <ADC5_DIE_TEMP>;
				label = "die_temp";
				qcom,pre-scaling = <1 1>;
			};
		};

		qcom,power-on@800 {
			compatible = "qcom,pm8998-pon";
			reg = <0x800>;
		};

		pm8195_2_clkdiv: clock-controller@5b00 {
			compatible = "qcom,spmi-clkdiv";
			reg = <0x5b00>;
			#clock-cells = <1>;
			qcom,num-clkdivs = <2>;
			clock-output-names = "pm8195_2_div_clk1",
						"pm8195_2_div_clk2";
			clocks = <&rpmhcc RPMH_CXO_CLK>;
			clock-names = "xo";
		};

		pm8195_2_gpios: pinctrl@c000 {
			compatible = "qcom,pm8150-gpio";
			reg = <0xc000>;
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};
	};

	qcom,pm8195@5 {
		compatible ="qcom,spmi-pmic";
		reg = <5 SPMI_USID>;
		#address-cells = <1>;
		#size-cells = <1>;
	};

	/* below definitions are for the third instance of pm8195 */
	qcom,pm8195@8 {
		compatible = "qcom,spmi-pmic";
		reg = <8 SPMI_USID>;
		#address-cells = <1>;
		#size-cells = <0>;

		pm8195_3_tz: qcom,temp-alarm@2400 {
			compatible = "qcom,spmi-temp-alarm";
			reg = <0x2400>;
			interrupts = <0x8 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
			io-channels = <&pm8195_3_vadc ADC5_DIE_TEMP>;
			io-channel-names = "thermal";
			#thermal-sensor-cells = <0>;
		};

		pm8195_3_vadc: vadc@3100 {
			compatible = "qcom,spmi-adc5";
			reg = <0x3100>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <0x8 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
			interrupt-names = "eoc-int-en-set";
			#io-channel-cells = <1>;
			io-channel-ranges;

			/* Channel node */
			ref_gnd {
				reg = <ADC5_REF_GND>;
				label = "ref_gnd";
				qcom,pre-scaling = <1 1>;
			};

			vref_1p25 {
				reg = <ADC5_1P25VREF>;
				label = "vref_1p25";
				qcom,pre-scaling = <1 1>;
			};

			die_temp {
				reg = <ADC5_DIE_TEMP>;
				label = "die_temp";
				qcom,pre-scaling = <1 1>;
			};
		};

		qcom,power-on@800 {
			compatible = "qcom,pm8998-pon";
			reg = <0x800>;
		};

		pm8195_3_clkdiv: clock-controller@5b00 {
			compatible = "qcom,spmi-clkdiv";
			reg = <0x5b00>;
			#clock-cells = <1>;
			qcom,num-clkdivs = <2>;
			clock-output-names = "pm8195_3_div_clk1",
						"pm8195_3_div_clk2";
			clocks = <&rpmhcc RPMH_CXO_CLK>;
			clock-names = "xo";
		};

		pm8195_3_gpios: pinctrl@c000 {
			compatible = "qcom,pm8150-gpio";
			reg = <0xc000>;
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};
	};

	qcom,pm8195@9 {
		compatible ="qcom,spmi-pmic";
		reg = <9 SPMI_USID>;
		#address-cells = <1>;
		#size-cells = <1>;
	};
};

/* PMIC GPIO pin control configurations */
&pm8195_1_gpios {
	storage_sd_detect {
		storage_cd_default: storage_cd_default {
			pins = "gpio4";
			function = "normal";
			input-enable;
			bias-pull-up;
			power-source = <0>;
		};
	};

	key_vol_up {
		key_vol_up_default: key_vol_up_default {
			pins = "gpio6";
			function = "normal";
			input-enable;
			bias-pull-up;
			power-source = <1>;
		};
	};
};